1. Field of the Invention
The invention relates to a method and apparatus for coordinating horizontal and vertical synchronization signals, more particularly to a method and apparatus for coordinating horizontal and vertical synchronization signals that can eliminate screen flicker.
2. Description of the Related Art
Display apparatus must show around thirty frames per second so as to form moving images by virtue of persistence of vision inhuman eyes. Each frame includes a plurality of scan lines, and each scan line includes a plurality of pixels. Thus, image signals received by a display apparatus from an image processing system include data corresponding to a series of pixels. In order to ensure that the display apparatus can locate the position corresponding to each pixel data, aside from the pixel data, the image processing system will further provide to the display apparatus a horizontal synchronization (HSYNC) signal to indicate the start of a scan line (referred to herein as line scan control), and a vertical synchronization (VSYNC) signal to indicate the start of a frame (referred to herein as field scan control). For illustrative purposes, in the following description, the line scan control and the field scan control are represented by the rising edge (i.e., the change from a low level state to a high level state) of each of the timing pulses of the HSYNC and VSYNC signals, respectively. Therefore, when the display apparatus detects the rising edge of one of the timing pulses of the HSYNC signal, the subsequent pixel data received thereby will be interpreted as those belonging to the next scan line, and when the display apparatus detects the rising edge of one of the timing pulses of the VSYNC signal, the subsequent pixel data received thereby will be interpreted as those belonging to the next frame. In this manner, image signals can be decoded and displayed correctly in sequence.
However, in practice, due to the effect of some environmental factors, such as interference, cross talk, etc., fluctuation of the frequencies of the HSYNC and VSYNC signals can occur. If the rising edges of the timing pulses of the HSYNC and VSYNC signals are too close to the extent that they almost overlap, the screen flicker will occur. As shown in FIG. 1, where the horizontal axis represents a time scale, rising edges 111, 121 of the HSYNC and VSYNC signals 11, 12 are shown to overlap within a clock cycle (T). The presence of frequency fluctuation rendered the rising edge 121 of the VSYNC signal 12 to overrun or to be delayed by one clock cycle (T) relative to the rising edge 111 of the HSYNC signal 11. In connection with an Nth frame, when the rising edge 111 of the HSYNC signal 11 appears after the rising edge 121 of the VSYNC signal 12, the subsequent pixel data will be determined as those belonging to the first scan line of the Nth frame. However, in connection with the (N+1)th frame, when the rising edge 111 of the HSYNC signal 11 appears before the rising edge 121 of the VSYNC signal 12, the subsequent pixel data corresponding to the first scan line of the (N+1)th frame will be erroneously determined as belonging to the Nth frame, and the first scan line of the (N+1)th frame will not be decoded and displayed. Moreover, the pixel data corresponding to the second scan line of the (N+1)th frame will be mistakenly identified as belonging to the first scan line of the (N+1)th frame, and will be decoded and displayed as such. Further, in connection with the (N+2)th frame, when the rising edge 111 of the HSYNC signal 11 once again appears after the rising edge 121 of the VSYNC signal 12, the subsequent pixel data corresponding to the first scan line of the (N+2)th frame will be mistakenly identified as belonging to the (N+1)th frame, and the first scan line of the (N+2)th frame will not be decoded and displayed. Therefore, during the display of a series of frames, first scan lines of the frames may be displayed at times and not displayed at other times. Screen flicker thus occurs to result in poor image rendering quality.
On the other hand, as shown in FIG. 2, it was found that when the rising edge 121′ of the VSYNC signal 12′ lags the rising edge 111′ of the HSYNC signal 11′ by a period greater than a critical time period, screen flicker due to frequency fluctuation can be avoided. There is thus a need for a method and apparatus that can guarantee a safety period between line scan and field scan control edges of the HSYNC and VSYNC signals to ensure stability and quality of images shown by a display apparatus.